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H8SX/1663R データシート(PDF) 209 Page - Renesas Technology Corp

部品番号 H8SX/1663R
部品情報  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663R データシート(HTML) 209 Page - Renesas Technology Corp

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Section 8 User Break Controller (UBC)
Rev. 2.00 Sep. 24, 2008 Page 177 of 1468
REJ09B0412-0200
Bit
Bit Name
Initial
Value
R/W
Description
5
4
IDn1
IDn0
0
0
R/W
R/W
Break Condition Select
These bits select the PC break as the source of UBC
break interrupt requests for the given channel.
00: Break requests will not be generated.
01: UBC break condition is the PC break.
1x: Setting prohibited
3
2
RWn1
RWn0
0
0
R/W
R/W
Read Select
These bits select read cycles as the bus cycle break
condition for the given channel.
00: Break requests will not be generated.
01: The bus cycle break condition is read cycles.
1x: Setting prohibited
1
0
0
0
R/W
R/W
Reserved
These bits are always read as 0. The write value
should always be 0.
[Legend]
n
= Channels A to D



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