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H8SX/1663R データシート(PDF) 236 Page - Renesas Technology Corp

部品番号 H8SX/1663R
部品情報  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663R データシート(HTML) 236 Page - Renesas Technology Corp

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Section 9 Bus Controller (BSC)
Rev. 2.00 Sep. 24, 2008 Page 204 of 1468
REJ09B0412-0200
9.2.10
SRAM Mode Control Register (SRAMCR)
SRAMCR specifies the bus interface of each area in the external address space as a basic bus
interface or a byte control SRAM interface.
In areas specified as 8-bit access space by ABWCR, the SRAMCR setting is ignored and the byte
control SRAM interface cannot be specified.
Bit
Bit Name
Initial Value
R/W
15
BCSEL7
0
R/W
14
BCSEL6
0
R/W
13
BCSEL5
0
R/W
12
BCSEL4
0
R/W
11
BCSEL3
0
R/W
10
BCSEL2
0
R/W
9
BCSEL1
0
R/W
8
BCSEL0
0
R/W
Bit
Bit Name
Initial Value
R/W
7
0
R
6
0
R
5
0
R
4
0
R
3
0
R
2
0
R
1
0
R
0
0
R
Bit
Bit Name
Initial
Value
R/W
Description
15
14
13
12
11
10
9
8
BCSEL7
BCSEL6
BCSEL5
BCSEL4
BCSEL3
BCSEL2
BCSEL1
BCSEL0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Byte Control SRAM Interface Select
Selects the bus interface for the corresponding area.
When setting a bit to 1, the bus interface select bits in
BROMCR, DRAMCR and MPXCR must be cleared to
0.
0: Area n is basic bus interface
1: Area n is byte control SRAM interface
(n = 7 to 0)
7 to 0
All 0
R
Reserved
These are read-only bits and cannot be modified.



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