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H8SX/1663R データシート(PDF) 252 Page - Renesas Technology Corp |
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H8SX/1663R データシート(HTML) 252 Page - Renesas Technology Corp |
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252 / 1504 page ![]() Section 9 Bus Controller (BSC) Rev. 2.00 Sep. 24, 2008 Page 220 of 1468 REJ09B0412-0200 9.3 Bus Configuration Figure 9.5 shows the internal bus configuration of this LSI. The internal bus of this LSI consists of the following three types. • Internal system bus 1 A bus that connects the CPU, DTC, DMAC, on-chip RAM, on-chip ROM, internal peripheral bus, and external access bus. • Internal system bus 2 A bus that connects the EXDMAC and external access bus • Internal peripheral bus A bus that accesses registers in the bus controller, interrupt controller, DMAC, and EXDMAC, and registers of peripheral modules such as SCI and timer. • External access bus A bus that accesses external devices via the external bus interface. CPU DTC DMAC B φ synchronization P φ synchronization I φ synchronization Bus controller, interrupt controller, power-down controller External bus interface Peripheral functions On-chip RAM On-chip ROM Internal system bus 1 Internal peripheral bus Write data buffer Write data buffer External access bus Internal system bus 2 EXDMAC Figure 9.5 Internal Bus Configuration |
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