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H8SX/1663R データシート(PDF) 111 Page - Renesas Technology Corp |
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H8SX/1663R データシート(HTML) 111 Page - Renesas Technology Corp |
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111 / 1504 page  Section 3 MCU Operating Modes Rev. 2.00 Sep. 24, 2008 Page 79 of 1468 REJ09B0412-0200 Section 3 MCU Operating Modes 3.1 Operating Mode Selection This LSI has seven operating modes (modes 1, 2, 3, 4, 5, 6, and 7). The operating mode is selected by the setting of mode pins MD2 to MD0. Enabling and disabling of the SDRAM interface can be selected with the MD3 setting for each operating mode. Table 3.1 lists MCU operating mode settings. Table 3.2 shows the SDRAM interface setting for each MCU operating mode Table 3.1 MCU Operating Mode Settings External Data Bus Width MCU Operating Mode MD2 MD1 MD0 CPU Operating Mode Address Space LSI Initiation Mode On-Chip ROM Default Max. 1 0 0 1 Advanced mode 16 Mbytes User boot mode Enabled 16 bits 2 0 1 0 Boot mode Enabled 16 bits 3 0 1 1 Boundary scan enabled single-chip mode Enabled 16 bits 4 1 0 0 Disabled 16 bits 16 bits 5 1 0 1 On-chip ROM disabled extended mode Disabled 8 bits 16 bits 6 1 1 0 On-chip ROM enabled extended mode Enabled 8 bits 16 bits 7 1 1 1 Single-chip mode Enabled 16 bits Table 3.2 SDRAM Interface Setting for each MCU Operating Mode MD3 SDRAM Interface 0 Disabled 1 Enabled In this LSI, an advanced mode as the CPU operating mode and a 16-Mbyte address space are available. The initial external bus widths are eight or 16 bits. As the LSI initiation mode, the external extended mode, on-chip ROM initiation mode, or single-chip initiation mode can be selected. |
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